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We present a test chip for the direct measure of the effects of inter/intra-chip process variations on the performance of CMOS circuits. The test structure is a ring oscillator made of modified CMOS inverters that may exhibit two slightly different delays depending on the value of a digital control signal. The incremental delay of each cell is measured from the oscillation periods obtained with different configurations of the control bits. Results are reported for different lots of a 0.18μm process.